Now showing items 1-3 of 3

    • D-latch based low power memory design 

      Tripathi, Saurabh (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      Low power consumption is the main attraction of the digital circuit design in the Sub threshold region of operation. In this region of operation less energy is consumed for active operation and less leakage power is ...
    • Low-power pipelined crypto-core using a backup flip-flop 

      Patel, Sagar (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      With increasing clock frequencies, power-aware computing has become a critical concern in the VLSI design. One of the most effective and widely used method for lowering the power is DVS (Dynamic Voltage Scaling), which ...
    • Path planning of data mule using responsible short circuit with steiner points 

      Vora, Ankitkumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      We have studied the problem of data aggregation method in wireless sensor network using the data mule. In data mule approach, Data mule is the mobile entity which can collect the data from stationary sensor node in the ...