Now showing items 1-5 of 5

    • Built-in self test architecture for mixed signal systems 

      Jain, Mahavir Rajmal (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
      Built-in self test architecture or BIST as we call them, are the necessity of time since the shrinking sizes of component on-chip with advance in IC technology are making it BIST artistries are being rapidly developed and ...
    • Transaction based verification of DA-FIR filter using AMBA AHBTm transactor 

      Lad, Umeshkumar Mangubhai (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
      Transaction based verification is used for faster verification purpose. Reusable transactors are designed and designs are verified at transaction level using these transactors. The test bench are written in higher level ...
    • Transaction based verification of discrete wavelet transform IP core using wishbone transactor 

      Patel, Birenkumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
      Verification is major concern in product development life cycle. The number of human hours required writing a test bench and choice of verification approach is the major contributor in the Non Recurring Engineering (NRE) ...
    • Transaction based verification of multimedia IP 

      Shah, Hirav (Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
      Verification is major concern in product development life cycle. The number of human hours required writing a test bench and choice of verification approach is the major contributor in the Non Recurring Engineering (NRE) ...
    • Verification of address generation unit and register file of digital signal processor using system verilog 

      Shah, Pratik Y. (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
      Verification of the digital systems become important part in the industry. In this thesis I verified two modules of ASIP DSP processor using System Verilog. The Thesis describes the design of Address Generation Unit (AGU) ...