Search
Now showing items 1-10 of 17
Design of CMOS voltage controlled oscillator for high tuning range
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
The main objective of the work is to design a CMOS voltage controlled oscillator for higher tuning range. Today there is a great need for multi-standard wireless receivers in the wireless communications. A receiver is to ...
Implementation of constant gm CMOS op-amp input stage using overlapping of transition region at 0.18 um technology
(Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
Operational amplifier is the backbone of most of analog circuit design. For low voltage applications, op-amp should have a rail-to-rail common mode input voltage. This report describes the implementation of a constant gm ...
Low power and high speed sample and hold circuit
(Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
In this thesis work the design of a high speed and low power CMOS sample and hold circuit as a front-end block of pipelined analog-to-digital converter is described. The circuit consists of bottom-plate sampling with ...
Low power high slew-rate adaptive biasing circuit for CMOS amplifiers
(Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
Adaptive biasing technique in analog and mixed signal integrated circuit design is used mainly to reduce the power and improve the driving capability. It has found many applications, like power amplifiers in RF communication ...
CMOS latched comparator design for analog to digital converters
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
Conventional comparators are at the two extremes as far as power delay product and isolation between input and output is concern. Either they achieved very good isolation at the cost of power in the preamplifier or save ...
CMOS RFIC mixer design
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
A CMOS RF (Radio Frequency) up/down conversion mixer results in a reasonable increase in transceiver integration and a reduction in cost. The design of mixers faces many compromises between conversion gain(GC), local ...
CMOS current-based mixed-signal architecture for vector-matrix multiplication
(Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
In present days electronic devices become faster. Computations like vector matrix
multiplication become more and more compliant and lengthy. For that CMOS based vectormatrix
multiplication architecture, with external ...
Design of CMOS front end for 900MHz RF receiver
(Dhirubhai Ambani Institute of Information and Communication Technology, 2004)
Portable wireless personal communication systems such as cellular phones, message pagers, and wireless modems traditionally have been built from a mixture of IC technologies. In fact if we section a commercial cellular ...
Design of a low power high slew rate OPAMP and to study its impact on sigma delta modulator's performance
(Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
This thesis presents the work done on the design of a low-power, high slew rate opamp and subsequently the design of a fully-differential second order Switched-Capacitor architecture of a Sigma Delta modulator in 1.8 V, ...
Design of a novel high linearity down conversion mixer for GSM band applications
(Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
Double balanced Gilbert cell mixer (GCM) is the mostly used kind of mixer as it provides
conversion gain and has port to port isolation. This mixer lacks in linearity and noise figure
which are to be taken care in designing ...