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Now showing items 11-17 of 17
Low power BIST architecture for fast multiplier embedded core
(Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
A typical core is deeply embedded in the chip of a system so that direct access to its input/output is not possible. Built in self test (BIST) structures are excellent solutions for testing embedded cores.
In this work, ...
Tool to calculate the width and length of capacitor for switched-capacitor band pass filter
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
The switched capacitor (SC) circuits find their applications in many fields. Due to their lower size at low frequencies, higher density can be achieved compared to active RC counterparts. Still there are nonlinerarities ...
Efficient scan-based BIST scheme for low heat dissipation and reduced test application time
(Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
Switching activity during test application can be significantly higher than that during normal circuit operation in many circuits. This is due to the fact that the correlation between consecutive test vectors is significantly ...
Design of laser driver circuit
(Dhirubhai Ambani Institute of Information and Communication Technology, 2005)
Designing an Optoelectronic Integrated Circuit (OEIC) is an attractive field of research as it bridges the interface between electrical and optical components. The design of laser driver in optical transmitter is very ...
1.5V, 2.4GHz highly linear CMOS downconversion mixer
(Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
In the tremendous growth of wireless handheld devices, low power consumption becomes a major consideration in radio frequency integrated circuit (RFIC) designs. This thesis explores low voltage low power RFIC design for ...
Designing of an efficient power clock generation circuit for complementary pass-transistor adiabatic logic carry save multiplier
(Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
This thesis presents a novel four-phase power clock generator for low power adiabatic logic without using inductors. The power clock generator is designed using current mirror arrangement of PMOS and NMOS transistors. ...
Transaction based verification of DA-FIR filter using AMBA AHBTm transactor
(Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
Transaction based verification is used for faster verification purpose. Reusable transactors are designed and designs are verified at transaction level using these transactors. The test bench are written in higher level ...