• Login
    JavaScript is disabled for your browser. Some features of this site may not work without it.

    Browse

    All of DSpaceCommunities & CollectionsBy Issue DateAuthorsTitlesSubjectsThis CollectionBy Issue DateAuthorsTitlesSubjects

    My Account

    LoginRegister

    Statistics

    View Usage StatisticsView Google Analytics Statistics

    Integrated receiver front-end: system level architectures and design issues for CDMA based applications

    Thumbnail
    View/Open
    200211017.pdf (1.460Mb)
    Date
    2004
    Author
    Sharma, Ashish kumar
    Metadata
    Show full item record
    Abstract
    During the last decade, the world of mobile communications has experienced an enormous growth. Among the important factors has been possible by the migration from the original analog mobile phones to handsets using digital technology. Another important factor has been the rapid progress in silicon IC technology that made it possible to squeeze ever more digital functions onto a single chip. Since CDMA will be among the front running technologies for the mobile communication applications, the presented work uses its PCS mode air-interface specifications as the demonstration vehicle to highlight design issues involved with the system level receiver design. This thesis deals with the design of integrated receiver front-end for CDMA-based mobile communication applications. Today circuits can be build in the mainstream CMOS technologies. For integration also it’s a viable option since, the large digital back-end is exclusively done in CMOS, so an attractive option is to integrate the RF front-end in CMOS itself. The work presented here outlines the design path of a receiver at system level, starting from fundamentals of RF design, architecture exploration, parameters responsible for degradation in receiver performance in this the focus is to study the effects of RF-Impairments on the QPSK modulation which is utilized in CDMA. Finally an analysis of CDMA receiver was done. The requirements of CDMA standard are mapped onto a set of measurable specifications for a highly integrated receiver. It is shown how a minimum required reception quality can be translated into specifications on the receiver’s noise figure, image rejection, inter-modulation, etc. and how these specifications can be distributed among different blocks. The simulation was carried out in MATLAB from Mathworks and ADS-2003 from Agilent technologies. The specifications for receiver components were taken from Maxim’s Chipsets and related literature.
    URI
    http://drsr.daiict.ac.in/handle/123456789/48
    Collections
    • M Tech Dissertations [923]

    Resource Centre copyright © 2006-2017 
    Contact Us | Send Feedback
    Theme by 
    Atmire NV
     

     


    Resource Centre copyright © 2006-2017 
    Contact Us | Send Feedback
    Theme by 
    Atmire NV