Hardware software co-design of software defined radio
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System on Chip are processor centric platform that offer hardware, software and I/O programmability on a single chip. A SoC basically consists of two parts - The Processing System and Programmable Logic. Processing System is formed around a processor while Programmable Logic section is FPGA logic fabric. The Software Defined Radio has become a main area of interest in wireless communication technology due to its re-configurability as per requirement using software. In SDR some physical layer functionalities have very high degree of computational complexity so software can be used to define the behaviour of these elements: it is unsuitable for implementing the processing itself. The less complex functionality such as encoding, modulation etc. can be performed either in software of hardware. This is the reason that SDR calls for a close integration of processor running software to control the physical layer functionality and a high speed reconfigurable resource to manage the physical layer processing. The work done here presents the idea of partitioning hardware and software parts of software defined radio (SDR) and it also includes functionality validation by implementation on a system on chip (SoC). The design used here is a multi mode multi band digital modulator which supports BPSK and QPSK modulation schemes.
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