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Asynchronous analog to digital converter
(Dhirubhai Ambani Institute of Information and Communication Technology, 2011)
Nowadays, asynchronous systems are becoming more popular for low power applications. Asynchronous Systems help to reduce metastability errors and clock skew errors. This thesis is about an asynchronous analog to digital ...
Design & layout of a low voltage folding & interpolation ADC for high speed applications
(Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
Analog to Digital Converters (ADC) and Digital to Analog Converters (DAC) plays a vital role
in mixed analog signalling, communication and digital signal processing world. Now a day,
the demand for designing of high ...
Novel 7T SRAM cell design for low power cache applications
(Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
Scaling in integrated circuit technology directly paves way to increased package density,
thereby increasing onchip power. With continuous scaling, low power design techniques
results in efficient use of silicon die. ...
Study of power in CR-SRAM in context of precharge reference voltage.
(Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
In Morden times power dissipation in electronic circuits has become more important due to increase use of portable and handheld devices. Increased operating frequency results in more power consumption in almost every VLSI ...
Designing of an efficient power clock generation circuit for complementary pass-transistor adiabatic logic carry save multiplier
(Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
This thesis presents a novel four-phase power clock generator for low power adiabatic logic without using inductors. The power clock generator is designed using current mirror arrangement of PMOS and NMOS transistors. ...