Browsing by Subject Integrated circuits

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Showing results 1 to 20 of 34  next >
PreviewIssue DateTitleAuthor(s)
200611027.pdf.jpg20081.5V, 2.4GHz highly linear CMOS downconversion mixerParikh, Chetan D.; Kumar, Ch. Uday
200611009.pdf.jpg2008Adaptive biased switched capacitor filtersParikh, Chetan D.; Bajaj, Garima
200711018.pdf.jpg2009Analysis and modeling of power distribution network and decoupling network design strategies for high speed digital and analog VLSI systemMandal, Sushanta; Nagpal, Raj Kumar; Nagchoudhuri, Dipankar; Pathak, Abhishek
200511028.pdf.jpg2007ASIC implementation of discrete fourier transform processing moduleDubey, Rahul; Gupta, Navneet
200911014.pdf.jpg2011Asynchronous analog to digital converterParikh, Chetan D.; Patel, Vidyut A.
200811022.pdf.jpg2010Auto tuning circuit for continuous time filtersSen, Subhajit; Nadimenti, Rakesh
200711031.pdf.jpg2009Built-in self test architecture for mixed signal systemsMandal, Sushanta; Nagchoudhuri, Dipankar; Jain, Mahavir Rajmal
200911005.pdf.jpg2011Capacitor mismatch in switched capacitor circuits, techniques to minimize mismatchParikh, Chetan D.; Chevella, Subhash
200811026.pdf.jpg2010Column decoder for memory redundant cell arrayNagchoudhuri, Dipankar; Nahar, Pinky
201111023.pdf.jpg2013CTS and CCOpt metodology's to achieve low skew-low power clock.Bhatt, Amit; Sreekanth, M.
201011043.pdf.jpg2012Design & layout of a low voltage folding & interpolation ADC for high speed applicationsSen, Subhajit; Tiwari, Sandeep Kumar
200611018.pdf.jpg2008Design of a CMOS variable gain amplifierParikh, Chetan D.; Verma, Vivek
200311041.pdf.jpg2005Design of laser driver circuitRoy, Anil K.; Parikh, Chetan D.; Khera, Neha
200611012.pdf.jpg2008Design of low-voltage, low-power, wide-band CMOS LC VCO using active inductorsParikh, Chetan D.; Sesha Sai, Aduru Venkata Raghava
200711020.pdf.jpg2009Design of the analog front end circuit for X-ray detectorsParikh, Chetan D.; Roy, Subhash Chandra
200811040.pdf.jpg2010Design of the high speed, high accuracy and low power current comparatorsParikh, Chetan D.; Chasta, Neeraj Kumar
200611020.pdf.jpg2008Design of voltage reference circuitsParikh, Chetan D.; Panchal, Bhavi
200611021.pdf.jpg2008Designing of an efficient power clock generation circuit for complementary pass-transistor adiabatic logic carry save multiplierNagchoudhuri, Dipankar; Mandal, Sushanta Kumar; Ranjith, P
200411005.pdf.jpg2006Efficient scan-based BIST scheme for low heat dissipation and reduced test application timeNagchoudhuri, Dipankar; Shah, Malav
200811011.pdf.jpg2010High speed sample and hold circuit designParikh, Chetan D.; Dwivedi, Varun Kumar