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DRSR@DA-IICT
Browsing by Subject Large scale integration
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Showing results 1 to 3 of 3
Preview
Issue Date
Title
Author(s)
2008
Design of low power and high speed decoder for 1MB memory
Nagchoudhuri, Dipankar
;
Gupta, Punam Sen
2012
Novel 7T SRAM cell design for low power cache applications
NagChoudhuri, Dipankar
;
Joshi, Srawan Kumar
2013
Study of power in CR-SRAM in context of precharge reference voltage.
Zaveri, Mazad S
;
Rupapara, Kripal D.
