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Browsing by Author Zaveri, Mazad S
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Showing results 5 to 9 of 9
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Issue Date
Title
Author(s)
2013
HDL based implementation of a node of hierarchical temporal memory.
Zaveri, Mazad S
;
Vyas, Pavan R.
2014
HDL implementation of a node of bayesian polytree interface
Zaveri, Mazad S
;
Patel, Jayendra
2014
HDL implementation of associative memory based instruction predictor for power reduction
Zaveri, Mazad S
;
Rangani, Jaydeep
2013
HDL implementation of palm associative memory
Zaveri, Mazad S
;
Kacheria, Rachit M.
2013
Study of power in CR-SRAM in context of precharge reference voltage.
Zaveri, Mazad S
;
Rupapara, Kripal D.