Please use this identifier to cite or link to this item:
http://drsr.daiict.ac.in//handle/123456789/1128
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Parekh, Rutu | - |
dc.contributor.author | Nathwani, Nishit | - |
dc.date.accessioned | 2024-08-22T05:21:06Z | - |
dc.date.available | 2024-08-22T05:21:06Z | - |
dc.date.issued | 2022 | - |
dc.identifier.citation | Nathwani, Nishit (2022). ASIC Chip Design For Healthcare System. Dhirubhai Ambani Institute of Information and Communication Technology. vii, 26 p. (Acc. # T01048). | - |
dc.identifier.uri | http://drsr.daiict.ac.in//handle/123456789/1128 | - |
dc.description.abstract | We presents an application-specific integrated circuit (ASIC) implementation suitable for healthcare applications, which employ RISC-V as a digital processing unit and the sensor interfacing circuits. The motivation for improving living conditions day by day, sensors-based healthcare has been mostly used today era. SoC are used as monitoring tools for well-being or preventive purposes. Healthcare system with ultra low-power System on Chip (SoC) architecture specifically for wearable healthcare system, In order to reduce the power consumption of the processor, we design a ASIC that handles signal processing and provides computation The design consists of two sensors for collecting the force/pressure and ECG signal data. The design of analog circuits is done using the specifications obtained with these sensors. The data obtained can be processed with the computing device to extract information and take desired actions. The RTL-based design of a processor is implemented using Verilog HDL. Logic Equivalence is verified using Xilinx ISE. Physical realizations of the design are obtained using RTL to GDSII design flow. The analog design consists of unity gain buffer, sample and holds circuit, and flash type ADC. We have tested our ASICs with AMS verification methodology using Cadence CAD tools. Operating Frequency of overall system is observed 160 MHz and the area of digital core is 18088.380 ?m2 Total Power dissipation of the core is 368 ?W operating Frequency of analog core is 4 MHz and and area is 468000 and power dissipation is 192.950 mW. | - |
dc.publisher | Dhirubhai Ambani Institute of Information and Communication Technology | - |
dc.subject | System on Chip (SoC) | - |
dc.subject | Architecture | - |
dc.subject | Healthcare system | - |
dc.subject | ECG signal data | - |
dc.classification.ddc | 362.1068 NAT | - |
dc.title | ASIC Chip Design For Healthcare System | - |
dc.type | Dissertation | - |
dc.degree | M. Tech | - |
dc.student.id | 202011064 | - |
dc.accession.number | T01048 | - |
Appears in Collections: | M Tech Dissertations |
Files in This Item:
File | Size | Format | |
---|---|---|---|
202011064.pdf | 8 MB | Adobe PDF | View/Open |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.