Please use this identifier to cite or link to this item:
http://drsr.daiict.ac.in//handle/123456789/1176
Title: | Neural Network Architectures for Integrated Circuits |
Authors: | Maiti, Tapas Kumar Nagrani, Khyati |
Keywords: | Neural Network Integrated Circuits Architecture design MIMO MISO SISO |
Issue Date: | 2023 |
Publisher: | Dhirubhai Ambani Institute of Information and Communication Technology |
Citation: | Nagrani, Khyati (2023). Neural Network Architectures for Integrated Circuits. Dhirubhai Ambani Institute of Information and Communication Technology. vii, 61 p. (Acc. # T01117). |
Abstract: | This thesis presents the architecture design and implementation of neural networks(NNs) for integrated circuit design. The architecture consists of adders,multipliers, and rectified linear unit (ReLU) blocks. Three architectures, namely,Single-In Single-Out (SISO), Multiple-In Single-Out (MISO), and Multiple-In Multiple-Out (MIMO) are developed. In neural networks, weight values are necessaryand they are supplied from a memory source. The weight values were preparedby training the NNs model on software. Finally, the SISO, MISO, and MIMOneural-networks were taped out. These architectures can be used for intelligentco-processor development. |
URI: | http://drsr.daiict.ac.in//handle/123456789/1176 |
Appears in Collections: | M Tech Dissertations |
Files in This Item:
File | Size | Format | |
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202111031.pdf | 3.32 MB | Adobe PDF | View/Open |
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