Please use this identifier to cite or link to this item: http://drsr.daiict.ac.in//handle/123456789/154
Title: Area reduction in 8 bit binary DAC using current multiplication
Authors: Parikh, Chetan D.
Upraity, Maitry
Keywords: Analog-to-digital converters
Digital-to-analog converters
Design and construction
Electronic circuit design
Microwave integrated circuits
Linear integrated circuits
Microwave equipment circuits
Issue Date: 2007
Publisher: Dhirubhai Ambani Institute of Information and Communication Technology
Citation: Upraity, Maitry (2007). Area reduction in 8 bit binary DAC using current multiplication. Dhirubhai Ambani Institute of Information and Communication Technology, ix, 30 p. (Acc.No: T00117)
Abstract: A proposed current multiplication technique is applied on 8 bit binary current steering Digital-to -Analog Converters with LSB 150 μA, to reduce area. MSB 1 and MSB 2 current are first kept half to reduce area and then current multiplication is performed to get the desired output. Compare to the conventional binary current steering Digital-to-Analog Converters, 20.66% area is reduced and static errors are found within limit. Maximum Integral nonlinearity is-18μA (< LSB) and Differential nonlinearity5.02 μA (< LSB).
URI: http://drsr.daiict.ac.in/handle/123456789/154
Appears in Collections:M Tech Dissertations

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