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Title: | Adaptive analog line driver using digital tuning |
Authors: | Sen, Subhajit Singh, Harsh Verdhan |
Keywords: | Electronic circuit design Self-tuning controllers Digital-to-analog converter Analog electronic systems Testing Analogue Front-End Architecture Data transmission systems Analog design CMOS line driver High speed amplifier Adaptive line termination Online tuning Large-Scale Nonlinear Optimization |
Issue Date: | 2010 |
Publisher: | Dhirubhai Ambani Institute of Information and Communication Technology |
Citation: | Singh, Harsh Verdhan (2010). Adaptive analog line driver using digital tuning. Dhirubhai Ambani Institute of Information and Communication Technology, x, 54 p. (Acc.No: T00268) |
Abstract: | Transmission lines are widely used for transmitting electrical signals. A line driver is a part of the analog front-end transmitter for wired line communication. It is a voltage buffer that provides the necessary output current to drive the small load impedance of a terminated transmission line. The adaptive line driver must adapt to the load impedance of a terminated transmission line for minimizing reflections. The main requirements of an adaptive line driver are good matching to the input impedance of the transmission line over process variations, high output swing, unity gain. Existing adaptive line drivers use analog tuning methods for adapting to the load impedance. This thesis proposes a new technique for tuning output impedance of the line driver. A digital tuning method is used to correct the output impedance of the line driver to match with the input impedance of the transmission line. The aim of using the digital tuning method is to achieve better tuning range over existing analog tuning methods. The tuning scheme uses a comparator followed by counter and current DAC(digital- to-analog converter). A comparator is used for comparing input and output signal of line driver and generates control signal which is applied to a counter that controls the current DAC. This feedback loop ensures unity gain between the input and out- put voltages and thereby ensures tuning of the output impedance of the line driver. The analog line driver is implemented in GPDK-180nm technology and simulated in Cadence Virtuoso Environment. |
URI: | http://drsr.daiict.ac.in/handle/123456789/305 |
Appears in Collections: | M Tech Dissertations |
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