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1v rail to tail operational amplifier design for sample and hold circuits
(Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
At low voltage, the input common mode voltage of Operational amplifier is limited which restricts its use as a buffer. This works deals with designing a rail to rail amplifier. The Thesis presents a 1V rail to rail operational ...
Investigation of low power design of left-right leap frog array multiplier
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
This thesis addresses the Low Power design of 12 bit LRLFAM at the Layout, circuit and logic levels. A new Low power Booth-Recoder (BR), and Multiplexer based partial product generated are designed using pass-Transistor ...
Analysis of charge injection in a MOS analog switch with impedance on source side
(Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
Turning off of a transistor introduces error voltage at the output of Sample and Hold circuits
which are the key components of Analog to Digital Converters (ADCs) and hence limits their
accuracy of performance in high ...
Low drop-out (LDO) voltage regulator without off-chip capacitor
(Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
Designing of Low Drop-Out Voltage Regulators (LDOs) operating without a large off-chip capacitor, having a very good transient response and maintaining the loop stability for full load current range in low supply voltage ...