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ASIC implementation of discrete fourier transform processing module
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
This work presents the design and ASIC implementation of Discrete Fourier Transform Processing Module. The performance of designed DFT processing module is better than radix-2 and radix-4 FFT algorithms, and is comparable ...
Practical approaches for photometric stereo
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
In this thesis work, we aim to propose approaches for photometric stereo that are less time consuming and have low computational requirements. Many applications of computer vision require high resolution 3-D structure of ...
Modeling MANETs using queuing networks
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
Mobile Ad Hoc Networks (MANETs) are becoming an attractive solution to the services that require flexible establishment, dynamic and low cost wireless connectivity. Since nodes are mobile, routing results vary significantly ...
ASIC implementation of a pipelined bitrapezoidal architecture for discrete covariance kalman filter
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
This work presents, the complete ASIC implementation of Discrete Covariance Kalman ¯lter, on a Parallel and Pipelined Bitrapezoidal Systolic Array architecture. The Kalman Filter equations are mapped on the designed ...
Security analysis of two fair exchange protocols
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
E-commerce applications enable two parties to exchange digital items electronically. It is critical for such applications that the underlying protocols ensure the fairness requirement: no honest participant should suffer ...
On path complexities of heapsort algorithm and the class stack
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
A measure of program complexity, called Path Complexity, based on the number of program execution paths as a function of the input size n, is proposed in [AJ05]. This measure can be used to compare the complexity of two ...
CMOS latched comparator design for analog to digital converters
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
Conventional comparators are at the two extremes as far as power delay product and isolation between input and output is concern. Either they achieved very good isolation at the cost of power in the preamplifier or save ...
Design methodology for architecting application specific instruction set processor
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
Application Specific Instruction-set Processors (ASIP), also referred as extensible processors, represent the state-of-the-art microprocessor architecture. ASIPs are practically leading towards the realization of ...
Area reduction in 8 bit binary DAC using current multiplication
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
A proposed current multiplication technique is applied on 8 bit binary current steering Digital-to -Analog Converters with LSB 150 μA, to reduce area. MSB 1 and MSB 2 current are first kept half to reduce area and then ...
CMOS RFIC mixer design
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
A CMOS RF (Radio Frequency) up/down conversion mixer results in a reasonable increase in transceiver integration and a reduction in cost. The design of mixers faces many compromises between conversion gain(GC), local ...