Interrupt based system-on-chip for IOT application with deterministic response and low power usage
Internet of Things (IOT) is rapidly evolving which requires a customized processorwith low power and minimum cost to leverage data gathered by sensors andaccordingly give output to the actuators and other physical objects. As today�?AZ� srequirement is real time application the response of system should be deterministicto the actuators. Wishbone bus interconnection has been used to interconnectthe SoC with the input/output ports. SoC is synthesized using 45nm Nangate Open Cell slow library and to make it low power, clock gating, avoidance ofhigher fanout cells and dynamic power optimization has been implemented duringthe synthesis of design SoC. The target frequency of the SoC has been decidedas 100MHz although it is working in range of 50-200 MHz to compensate betweenperformance and power usage.
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