Browsing M Tech Dissertations by Title
Now showing items 180-199 of 820
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Design and analysis of ultra wideband low noise amplifier
(Dhirubhai Ambani Institute of Information and Communication Technology, 2018)With the advent of wireless technology, ultra wide band systems due to their fast data rate transmission have gained momentum. One of the basic building blocks of the receiver - Low Noise Amplifier (LNA) has seen various ... -
Design and development of an ontology for an agriculture information system
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)Conceptual structures (Information theory); Knowledge representation (Information theory); Semantic networks (Information theory). Traditional sources of information like books, agricultural extension officer are unable ... -
Design and implementation of 128-point fixed point streaming FFT processor for OFDM based communication system
(Dhirubhai Ambani Institute of Information and Communication Technology, 2009)Fast Fourier Transform (FFT) processors are today one of the most important blocks in communication systems. They are used in every communication system from broadband to 3G and digital TV to Radio LANs. This master’s ... -
Design and Implementation of 3-stage Low Power Interrupt Driven Processor using RISC-V ISA
(2020)The hardware-software interface, incorporated in the Instruction set architecture (ISA), is arguably the most crucial interface in the computer system. An open ISA standard can help in increasing the innovation in ... -
Design and implementation of a framework for context aware mobile services
(Dhirubhai Ambani Institute of Information and Communication Technology, 2004)Applications designed for mobile platforms are traditionally hampered by the limita¬tions of the client devices, in particular limited user interface and the change of user environment due to mobility. Incorporating location ... -
Design and implementation of a framework for context aware mobile services
(Dhirubhai Ambani Institute of Information and Communication Technology, 2004)Applications designed for mobile platforms are traditionally hampered by the limita¬tions of the client devices, in particular limited user interface and the change of user environment due to mobility. Incorporating location ... -
Design and implementation of a low power superscalar processor
(Dhirubhai Ambani Institute of Information and Communication Technology, 2018)Designed and Implemented a Superscalar processor, where it fetches and issues two instructions simultaneously and it has 6 stages. Initially, concentrated on designing the architecture to make the processor executing ... -
Design and Implementation of AI Accelerator based Coprocessor for IoT node using RISC-V ISA
(2021)Semiconductor industry has seen a considerable amount of growth in the processor industry. The design of a processor is focused on two aspects namely power and performance. Hardware acceleration is an efficient method to ... -
Design and implementation of high power amplifier using gallium nitride
(Dhirubhai Ambani Institute of Information and Communication Technology, 2016)In recent years, the use of Gallium Nitride (GaN) transistors as active device inpower amplifier circuits has increased. The advancement in the technology forsuitable substrate has allowed the use of this very promising ... -
Design and implementation of low power processor design using RISC-V ISA
(Dhirubhai Ambani Institute of Information and Communication Technology, 2019)This thesis, represents a design in which the processor is made to work once or twice on occurrence of external signal, therefore the processor remains idle most of the time. Unlike the processor used in mobile phones, ... -
Design and Implementation of Low Power RISC V ISA based Processor and Coprocessor design for Matrix Multiplication
(2021)RISC V is an open-source ISA that is used to design the processor and the coprocessor architecture. For fulfilling the requirement of matrix multiplication, a low power and high-performance multiply and accumulate unit has ... -
Design and implementation of low power superscalar processor
(Dhirubhai Ambani Institute of Information and Communication Technology, 2018)As the Reduced Instruction Set Computing (RISC) philosophy architecture provides higher operating frequency and low power design as compared to Complex Instruction Set Computing (CISC) philosophy, a single core superscalar ... -
Design and implementation of low power superscalar processor
(Dhirubhai Ambani Institute of Information and Communication Technology, 2018)This thesis presents design of a low power, general purpose, 4 issue superscalar processor, which fetches 4 instructions simultaneously and executes them parallelly. The processor fetches the instruction in program order, ... -
Design and implementation of low power superscalar processor
(Dhirubhai Ambani Institute of Information and Communication Technology, 2018)The processor architecture designed here is a modest step forward towards the designing of a power optimized superscalar processor. The heavy popularity of data intensive applications nowadays is demanding for high performance ... -
Design and Implementation of Low Power Superscalar Processors
(Dhirubhai Ambani Institute of Information and Communication Technology, 2018)This thesis presents an 8-stage low power Superscalar processor. Since there has come an upper limit on the frequency that a single core inline processor can provide, to improve performance we need to exploit concepts like ... -
Design and implementation of network intrusion detection system
(Dhirubhai Ambani Institute of Information and Communication Technology, 2004)Most of the intrusion detection systems are based on matching signatures or rules. These rules are the patterns that define the possibility of occurrence of attack. Such signature based intrusion detection system look at ... -
Design and implementation power interrupt-driven processor using RISC-V ISA
(Dhirubhai Ambani Institute of Information and Communication Technology, 2019)From the past mistakes of popular ISA's and with the motivation to work on one of the most important abstraction layer, the RISC-V ISA steps forth to upend the status quo. Working towards a low power processor that entertains ... -
Design and layout of single bit per stage pipelined ADC
(Dhirubhai Ambani Institute of Information and Communication Technology, 2011)The concept of pipe-lining, often used in digital circuits, can also be applied in the analog domain. It helps to achieve higher speed where several operations must be performed serially. In this work, pipe-lining is ... -
Design and Simulation of Single Electron Transistor based SRAM and its Memory Controller
(Dhirubhai Ambani Institute of Information and Communication Technology, 2017)"Heterogeneous 3-D integration of single electron transistor (SET) circuits with CMOS based circuits is achieved by stacking a SET layer above CMOS IC. Low power circuit and delay efficient circuits can be designed using ... -
Design and synthesis of asynchronous circuits
(Dhirubhai Ambani Institute of Information and Communication Technology, 2006)For a very long time, there has been a requirement of circuits that can overcome the difficulties caused by the delay assumptions involved in a physical system. With decreasing on-chip dimensions of circuits as a result ...