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Now showing items 21-27 of 27
Self-calibrating technique for digital-to-analog converter in successive approximation register analog-to-digital converter
(Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
Successive Approximation Register (SAR) analog to digital converter resolution is limited mainly by the capacitor ratio error; comparator offset voltage and capacitor voltage dependence error. A SAR ADC resolution is limited ...
Design of low voltage high performance voltage controlled oscillator
(Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
In this thesis an ultra low voltage differential capacitive feedback VCO is being proposed .The VCO operates at very low supply voltage of 0.6V.The VCO uses techniques like Forward Body Bias (FBB), and capacitive feedback ...
1.5V, 2.4GHz highly linear CMOS downconversion mixer
(Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
In the tremendous growth of wireless handheld devices, low power consumption becomes a major consideration in radio frequency integrated circuit (RFIC) designs. This thesis explores low voltage low power RFIC design for ...
Designing of an efficient power clock generation circuit for complementary pass-transistor adiabatic logic carry save multiplier
(Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
This thesis presents a novel four-phase power clock generator for low power adiabatic logic without using inductors. The power clock generator is designed using current mirror arrangement of PMOS and NMOS transistors. ...
Exploring small world effect in ad hoc network
(Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
Small world is a highly clustered i.e., a densely and fully connected network, with low degree of separation between the nodes. These networks have inherited the high clustering property of regular networks and low average ...
Particle swarm optimization based synthesis of analog circuits using neural network performance macromodels
(Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
This thesis presents an efficient an fast synthesis procedure for an analog circuit. The proposed synthesis procedure used artificial neural network (ANN) models in combination with particle swarm optimizer. ANN has been ...
Transaction based verification of DA-FIR filter using AMBA AHBTm transactor
(Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
Transaction based verification is used for faster verification purpose. Reusable transactors are designed and designs are verified at transaction level using these transactors. The test bench are written in higher level ...