Search
Now showing items 1-10 of 11
Low power microprocessor design
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
This research work tries to reduce the power consumption of a processor with signal processing features. For low power design, focus is on developing ‘Low power synthesizable Register File’, as the initial study shows that ...
Design of CMOS voltage controlled oscillator for high tuning range
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
The main objective of the work is to design a CMOS voltage controlled oscillator for higher tuning range. Today there is a great need for multi-standard wireless receivers in the wireless communications. A receiver is to ...
Investigation of low power design of left-right leap frog array multiplier
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
This thesis addresses the Low Power design of 12 bit LRLFAM at the Layout, circuit and logic levels. A new Low power Booth-Recoder (BR), and Multiplexer based partial product generated are designed using pass-Transistor ...
ASIC implementation of discrete fourier transform processing module
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
This work presents the design and ASIC implementation of Discrete Fourier Transform Processing Module. The performance of designed DFT processing module is better than radix-2 and radix-4 FFT algorithms, and is comparable ...
Modeling MANETs using queuing networks
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
Mobile Ad Hoc Networks (MANETs) are becoming an attractive solution to the services that require flexible establishment, dynamic and low cost wireless connectivity. Since nodes are mobile, routing results vary significantly ...
Design methodology for architecting application specific instruction set processor
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
Application Specific Instruction-set Processors (ASIP), also referred as extensible processors, represent the state-of-the-art microprocessor architecture. ASIPs are practically leading towards the realization of ...
Area reduction in 8 bit binary DAC using current multiplication
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
A proposed current multiplication technique is applied on 8 bit binary current steering Digital-to -Analog Converters with LSB 150 μA, to reduce area. MSB 1 and MSB 2 current are first kept half to reduce area and then ...
CMOS RFIC mixer design
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
A CMOS RF (Radio Frequency) up/down conversion mixer results in a reasonable increase in transceiver integration and a reduction in cost. The design of mixers faces many compromises between conversion gain(GC), local ...
Design of low voltage high performance, wide bandwidth current feedback amplifier with complementary input pair
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
This thesis presents the work done on the design of a low voltage high performance, wide bandwidth current feedback amplifier [CFA] with complementary input pair. The design is carried out in 1.8 V, 0.18 micron CMOS process. ...
Fault diagnosis algorithm for a flash ADC using oscillation based testing technique
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
With the advent of system-on-a-chip (SoC) designs, the semiconductor industry wants to solve problems that constrain the coexistence of analog and digital cores on a single chip. The complexities of modern (SoC's), comprising ...