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Low power microprocessor design
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
This research work tries to reduce the power consumption of a processor with signal processing features. For low power design, focus is on developing ‘Low power synthesizable Register File’, as the initial study shows that ...
1v rail to tail operational amplifier design for sample and hold circuits
(Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
At low voltage, the input common mode voltage of Operational amplifier is limited which restricts its use as a buffer. This works deals with designing a rail to rail amplifier. The Thesis presents a 1V rail to rail operational ...
Investigation of low power design of left-right leap frog array multiplier
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
This thesis addresses the Low Power design of 12 bit LRLFAM at the Layout, circuit and logic levels. A new Low power Booth-Recoder (BR), and Multiplexer based partial product generated are designed using pass-Transistor ...
Asynchronous analog to digital converter
(Dhirubhai Ambani Institute of Information and Communication Technology, 2011)
Nowadays, asynchronous systems are becoming more popular for low power applications. Asynchronous Systems help to reduce metastability errors and clock skew errors. This thesis is about an asynchronous analog to digital ...
Design methodology for architecting application specific instruction set processor
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
Application Specific Instruction-set Processors (ASIP), also referred as extensible processors, represent the state-of-the-art microprocessor architecture. ASIPs are practically leading towards the realization of ...
Analysis of charge injection in a MOS analog switch with impedance on source side
(Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
Turning off of a transistor introduces error voltage at the output of Sample and Hold circuits
which are the key components of Analog to Digital Converters (ADCs) and hence limits their
accuracy of performance in high ...
Design & layout of a low voltage folding & interpolation ADC for high speed applications
(Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
Analog to Digital Converters (ADC) and Digital to Analog Converters (DAC) plays a vital role
in mixed analog signalling, communication and digital signal processing world. Now a day,
the demand for designing of high ...
Design of low voltage high performance, wide bandwidth current feedback amplifier with complementary input pair
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
This thesis presents the work done on the design of a low voltage high performance, wide bandwidth current feedback amplifier [CFA] with complementary input pair. The design is carried out in 1.8 V, 0.18 micron CMOS process. ...
Low drop-out (LDO) voltage regulator without off-chip capacitor
(Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
Designing of Low Drop-Out Voltage Regulators (LDOs) operating without a large off-chip capacitor, having a very good transient response and maintaining the loop stability for full load current range in low supply voltage ...
Novel 7T SRAM cell design for low power cache applications
(Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
Scaling in integrated circuit technology directly paves way to increased package density,
thereby increasing onchip power. With continuous scaling, low power design techniques
results in efficient use of silicon die. ...