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Low power microprocessor design
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
This research work tries to reduce the power consumption of a processor with signal processing features. For low power design, focus is on developing ‘Low power synthesizable Register File’, as the initial study shows that ...
Realization of FPGA based digital controller
(Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
Field Programmable Gate Array (FPGA) can be used to enhance the efficiency and the flexibility of digital controller. FPGA implementation of digital controllers leads to real time realizations with small size and high ...
Design of the analog front end circuit for X-ray detectors
(Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
The Thesis presents a novel idea to efficiently read out the value corresponding to incident X-Ray, from X-Ray sensor. A system level solution has been proposed which is unique in itself in terms of approach. A simple ...
Design of CMOS voltage controlled oscillator for high tuning range
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
The main objective of the work is to design a CMOS voltage controlled oscillator for higher tuning range. Today there is a great need for multi-standard wireless receivers in the wireless communications. A receiver is to ...
Design of multi-band fractal antenna for satellite navigation application
(Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
Recent efforts by several researchers around the world to combine fractal geometry with electromagnetic theory have led to a plethora of new and innovative antenna designs. This research proposal has been primarily focused ...
Column decoder for memory redundant cell array
(Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
As the semiconductor technology advances, the yield of memory chip is reducing. The cause of yield degradation is errors in manufacturing process associated with tight geometries. The thesis work proposes a redundancy ...
1v rail to tail operational amplifier design for sample and hold circuits
(Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
At low voltage, the input common mode voltage of Operational amplifier is limited which restricts its use as a buffer. This works deals with designing a rail to rail amplifier. The Thesis presents a 1V rail to rail operational ...
Optical wireless sensor network design for a conducting chamber
(Dhirubhai Ambani Institute of Information and Communication Technology, 2011)
Now a day’s majority of the wireless sensor networks (WSNs) are based on Radio Frequency (RF) communication technology. But RF when used in an environment like that of metallic, conducting chamber exhibits large amount of ...
Investigation of low power design of left-right leap frog array multiplier
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
This thesis addresses the Low Power design of 12 bit LRLFAM at the Layout, circuit and logic levels. A new Low power Booth-Recoder (BR), and Multiplexer based partial product generated are designed using pass-Transistor ...
ASIC implementation of discrete fourier transform processing module
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
This work presents the design and ASIC implementation of Discrete Fourier Transform Processing Module. The performance of designed DFT processing module is better than radix-2 and radix-4 FFT algorithms, and is comparable ...