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Browsing by Author Zaveri, Mazad S

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Showing results 1 to 9 of 9

Preview	Issue Date	Title	Author(s)
	2013	16 bit dual threshold voltage conditional carry adder.	Zaveri, Mazad S; Dobaria, Renish
	2012	CMOS current-based mixed-signal architecture for vector-matrix multiplication	Zaveri, Mazad S; Chhaya, Vaibhav
	2012	FPGA based platform for spiking neural network	Zaveri, Mazad S; Chavada, Sujit
	2012	FPGA implementation of environment/noise classification using neural networks	Zaveri, Mazad S; Ambasana, Nikita B.
	2013	HDL based implementation of a node of hierarchical temporal memory.	Zaveri, Mazad S; Vyas, Pavan R.
	2014	HDL implementation of a node of bayesian polytree interface	Zaveri, Mazad S; Patel, Jayendra
	2014	HDL implementation of associative memory based instruction predictor for power reduction	Zaveri, Mazad S; Rangani, Jaydeep
	2013	HDL implementation of palm associative memory	Zaveri, Mazad S; Kacheria, Rachit M.
	2013	Study of power in CR-SRAM in context of precharge reference voltage.	Zaveri, Mazad S; Rupapara, Kripal D.

Showing results 1 to 9 of 9