Browsing by Author "Agrawal, Yash"
Now showing items 1-19 of 19
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Analysis of on-chip interconnects using prospective neural network techniques
Misra, Ajita (2020)With the advancement in technology the number of transistors being fabricated on a single integrated chips (IC) increase manifold as stated in Moore’s law. Due to this increase in the transistors and thereby shrinking of ... -
Area efficient and high performance approximate multiplier design
Lad, Pinal Bharatbhai (Dhirubhai Ambani Institute of Information and Communication Technology, 2019)FPGA can provide an efficient way of approximation due to their reprogrammable structure in contrast to ASIC based approximations. The work presents an optimized approximation methodology for multiplier design which utilizes ... -
Capacitive Electrode for Bio-Medical Applications
Purohit, Shubham (2021)In recent years, advancements in medical and healthcare-based embedded systems have increased rapidly. Such systems include magnetic resonance imaging (MRI), computed tomography (CT) scanners, ultrasound imaging, digital ... -
Design and Analysis of Graphene Based Microstrip Patch Antenna at 7 THz
Pala, Vidhi (2021)The need for high-speed transmission of information has extensively increased in today’s wireless and communication world. For an effective antenna design, material, and peripheral circuit to it are important parameters ... -
Design and Simulation of Single Electron Transistor Based High-Performance Computing System at Room Temperature
Patel, Rashmit (Dhirubhai Ambani Institute of Information and Communication Technology, 2021)"The VLSI technology has seamlessly grown over the years, that yields high-performance, low-power and high-density devices. Over the several decades, the performance of existing complementary metal-oxide semiconductor ... -
Design of leaf cell layouts for memory compiler
Nagaich, Esha (Dhirubhai Ambani Institute of Information and Communication Technology, 2019)Digital layouts are designed in such a way that it should have minimum area and hence lesser delay.On the contrary analog layouts are made using best matching technique so as to provide same environment to each transistors.In ... -
Design of prominent floating point multiplier using single electron transistor operating at room temperature
Banik, Sanghamitra; Trivedi, Rachesh (Dhirubhai Ambani Institute of Information and Communication Technology, 2019)This project work has two main objectives. First is to introduce SET based device in digital logic circuit design. SET based devices has tremendous potential for the exploration to improve the current CMOS based device. ... -
Design of prominent time-to-digital (TDC) converter using single electron transistor operating at room temperature
Trivedi, Richesh; Banik, Sanghmitra (Dhirubhai Ambani Institute of Information and Communication Technology, 2019)This project work has two main objectives. First is to introduce SET based device in digital logic circuit design, SET based devices has tremendous potential for the exploration and to improve the current CMOS based device. ... -
Device modelling and circuit designing using prominent neural network
Diksha (2020)VLSI system is aggregation of millions of active and passive elements. Determination of different parameters of active elements and accurate value of passive elements for desired output characteristic is undoubtedly a ... -
Emerging On-Chip interconnects for futuristic integrated circuit design
Shah, Urmi (Dhirubhai Ambani Institute of Information and Communication Technology, 2019)Performance of VLSI technology is strongly influenced by interconnect delay. Scaling of ICs leads to many signal integrity issues. The demand for high speed, low power and compact chip size have led on-chip interconnects ... -
Implementation of ALU using RTL to GDSII flow and on NEXYS 4 DDR FPGA board
Kachhadiya, Radhika J. (2021)An ALU is the major part of the CPU which performs various arithmetic and logical operations. It is one of the most frequently used modules in the processor. This paper presents the implementation of 8-bit ALU using RTL ... -
Investigation of emerging graphene field effect transistors for low power applications
Maheshwari, Eti (Dhirubhai Ambani Institute of Information and Communication Technology, 2019)The onset of VLSI industry started with big sized chips with some thousand number of transistors incorporating several functionalities. Transistor dimension used then was some hundreds of micometer. This has stepped towards ... -
IP testing through an automation framework VIPER
Gupta, Rishabh (Dhirubhai Ambani Institute of Information and Communication Technology, 2019)The objective of the project work is to establish an understanding of Automation and also how it can be used for testing of IPs. The entire automation framework has been written in Perl Programming Language. The Automation ... -
Modeling and comparative analysis of Si-MOSFET and GaAs FETs for high speed devices
Panchal, Karishma (Dhirubhai Ambani Institute of Information and Communication Technology, 2019)For the last few decades, silicon has been the promising device for realizing digital and analog circuits in integrated circuits. It is widely used for implementing a MOS-FET device. In the present work, Si-MOSFET ... -
Parasitic Extraction and Performance Assessment using Experimental Analysis of rGO Interconnects for PCB Designs
Makhe, Vishank (2021)In this work, a novel reduced graphene oxide (rGO) interconnects for printed circuit boards (PCBs) designs are investigated using experimental analysis. rGO is a newly investigated and prominent material owing to its good ... -
Performance analysis of next generation graphene interconnects
Patel, Nikita (Dhirubhai Ambani Institute of Information and Communication Technology, 2018)The state-of-the-art development and subsequent miniaturization of technologiesin e-systems such as computers and digital communication systems, have led todensely and compactly placement of devices and interconnects in ... -
Performance Assessment of Edge Traffic Distribution Routing Algorithm for Graphene Based Network-on-Chip
Gupta, Yatin Kumar (2021)Network-on-chip (NoC) has evolved as new paradigm for high-dense interconnect configurations in advanced integrated circuit designs. The increasing numbers of transistor cores with decrease in chip area is the leading ... -
Smart soldier asystem incorporating embedded electronics
Teja, N. K. (Dhirubhai Ambani Institute of Information and Communication Technology, 2019)Now a days, the defence technology is heading towards new innovation along with advanced implementation. Monitoring the soldier's activity and health at the frontline area of operation forms an essential entity in determining ... -
Study of transactional synchronization extensions (TSX) feature in x86 processor architecture
Jain, Jiket (Dhirubhai Ambani Institute of Information and Communication Technology, 2019)Improving performance has always been at the center of a new CPU design. Simultaneous Multi-Threading is one of the ways to achieve better performance in terms of CPU utilization. In case of Multi-Threading, threads share ...