Now showing items 1-20 of 54

    • 1.5V, 2.4GHz highly linear CMOS downconversion mixer 

      Kumar, Ch. Uday (Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
      In the tremendous growth of wireless handheld devices, low power consumption becomes a major consideration in radio frequency integrated circuit (RFIC) designs. This thesis explores low voltage low power RFIC design for ...
    • 10-bit high speed high SFDR current steering DAC 

      Bapodra, Dhairya B. (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
      The Thesis presents an attempt to design a 10-bit High Speed High SFDR Current Steering DAC with a simple and different approach. Most of earlier approaches contain complex design and bulky unary portion. Here an approach ...
    • 1v rail to tail operational amplifier design for sample and hold circuits 

      Kumar, Mahesh (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
      At low voltage, the input common mode voltage of Operational amplifier is limited which restricts its use as a buffer. This works deals with designing a rail to rail amplifier. The Thesis presents a 1V rail to rail operational ...
    • Analysis of charge injection in a MOS analog switch with impedance on source side 

      Rao, D. Srinivas (Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
      Turning off of a transistor introduces error voltage at the output of Sample and Hold circuits which are the key components of Analog to Digital Converters (ADCs) and hence limits their accuracy of performance in high ...
    • Area reduction in 8 bit binary DAC using current multiplication 

      Upraity, Maitry (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
      A proposed current multiplication technique is applied on 8 bit binary current steering Digital-to -Analog Converters with LSB 150 μA, to reduce area. MSB 1 and MSB 2 current are first kept half to reduce area and then ...
    • ASIC implementation of discrete fourier transform processing module 

      Gupta, Navneet (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
      This work presents the design and ASIC implementation of Discrete Fourier Transform Processing Module. The performance of designed DFT processing module is better than radix-2 and radix-4 FFT algorithms, and is comparable ...
    • Asynchronous analog to digital converter 

      Patel, Vidyut A. (Dhirubhai Ambani Institute of Information and Communication Technology, 2011)
      Nowadays, asynchronous systems are becoming more popular for low power applications. Asynchronous Systems help to reduce metastability errors and clock skew errors. This thesis is about an asynchronous analog to digital ...
    • Auto tuning circuit for continuous time filters 

      Nadimenti, Rakesh (Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
      This thesis presents the design of auto tuning circuit for continuous time filters and is designed for applications that require high linearity and moderate precision. This scheme is used to improve tuning range of 50% and ...
    • Built-in self test architecture for mixed signal systems 

      Jain, Mahavir Rajmal (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
      Built-in self test architecture or BIST as we call them, are the necessity of time since the shrinking sizes of component on-chip with advance in IC technology are making it BIST artistries are being rapidly developed and ...
    • Capacitor mismatch in switched capacitor circuits, techniques to minimize mismatch 

      Chevella, Subhash (Dhirubhai Ambani Institute of Information and Communication Technology, 2011)
      This thesis about the designing of capacitive mismatch insensitive switched capacitor amplifier for analog to digital converters (ADC). The accuracy of the conversion is an important factor. The accuracy depends upon the ...
    • CMOS RFIC mixer design 

      Gupta, Mukesh (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
      A CMOS RF (Radio Frequency) up/down conversion mixer results in a reasonable increase in transceiver integration and a reduction in cost. The design of mixers faces many compromises between conversion gain(GC), local ...
    • Column decoder for memory redundant cell array 

      Nahar, Pinky (Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
      As the semiconductor technology advances, the yield of memory chip is reducing. The cause of yield degradation is errors in manufacturing process associated with tight geometries. The thesis work proposes a redundancy ...
    • CTS and CCOpt metodology's to achieve low skew-low power clock. 

      Sreekanth, M. (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
      In synchronous VLSI chips, clock distribution network plays an important role. The quality of clock network mainly effects the performance of the chip, because the speed of data transfer depends on clock signal. Achieving ...
    • D-latch based low power memory design 

      Tripathi, Saurabh (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      Low power consumption is the main attraction of the digital circuit design in the Sub threshold region of operation. In this region of operation less energy is consumed for active operation and less leakage power is ...
    • Design & layout of a low voltage folding & interpolation ADC for high speed applications 

      Tiwari, Sandeep Kumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
      Analog to Digital Converters (ADC) and Digital to Analog Converters (DAC) plays a vital role in mixed analog signalling, communication and digital signal processing world. Now a day, the demand for designing of high ...
    • Design and layout of single bit per stage pipelined ADC 

      Chaora, Ankeet (Dhirubhai Ambani Institute of Information and Communication Technology, 2011)
      The concept of pipe-lining, often used in digital circuits, can also be applied in the analog domain. It helps to achieve higher speed where several operations must be performed serially. In this work, pipe-lining is ...
    • Design and synthesis of asynchronous circuits 

      Asthana, Abhinav (Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
      For a very long time, there has been a requirement of circuits that can overcome the difficulties caused by the delay assumptions involved in a physical system. With decreasing on-chip dimensions of circuits as a result ...
    • Design issues in direct conversion receiver 

      Gupta, Amit Kumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
      The wireless system is being rapidly proliferated in our life. The growing of capacity in wireless communication requires a new type of wireless communication method which does not affect current work on circuits and systems ...
    • Design methodology for architecting application specific instruction set processor 

      Desai, Meghana (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
      Application Specific Instruction-set Processors (ASIP), also referred as extensible processors, represent the state-of-the-art microprocessor architecture. ASIPs are practically leading towards the realization of ...
    • Design of a novel high linearity down conversion mixer for GSM band applications 

      Srinaga, Nikhil N. (Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
      Double balanced Gilbert cell mixer (GCM) is the mostly used kind of mixer as it provides conversion gain and has port to port isolation. This mixer lacks in linearity and noise figure which are to be taken care in designing ...