Browsing by Author "Bhatt, Amit"

Now showing items 21-40 of 40

    • Design Of Variable Frequency Low Power Interrupt Driven Processor With Deterministic Response 

      Sharma, Ayushi (Dhirubhai Ambani Institute of Information and Communication Technology, 2017)
      "This thesis, presents a design for real-time, low power, interrupt driven processor to monitor ambulatory patients. To achieve low power goals, a power-aware algorithm is proposed for scheduling periodic and sporadic ...

    • Digital implementation of orthogonal frequency division multiplexing 

      Bhanushali, Artiben (Dhirubhai Ambani Institute of Information and Communication Technology, 2017)
      "OFDM (Orthogonal Frequency Division Multiplexing) is the most important part of 4G and 5G technology which is adopted by many standards because of its various advantages. In this thesis, firstly prototype of OFDM system ...

    • Dynamic recognfiguration of cache memories for leakage power reduction 

      Kalidindi, Vijaya Rama Raju (Dhirubhai Ambani Institute of Information and Communication Technology, 2014)
      Power is increasingly becoming a design constraint for low power VLSI circuits. It has become one of the most important paradigms of design convergence for future icroprocessors. The scaling of the CMOS channel length to ...

    • High Performance Computing 

      Patel, Jaykumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2016)
      Technology today has evolved from the Mainframe computers to laptops to small and smart handheld devices. These smart end devices are accompanied with extremely robust ARM 64-bit processors which are a perfect blend of ...

    • Implementation & analysys of neural networks on microcontrollers 

      Suthar, Het (2021)
      In this work, various neural network architectures such as convolutional neural network (CNN), deep neural networks (DNN), depth wise separable neural network (DS-CNN), have been deployed on different microcontrollers with ...

    • Implementation of different branch prediction schemes on FabScalar generated superscalar processor 

      Patel, Jayesh (Dhirubhai Ambani Institute of Information and Communication Technology, 2014)
      Performance of modern pipeline processor depends on steady flow of useful instruction for processing. Branch instruction in the program disrupts the sequential flow of instruction by presenting multiple paths through which ...

    • Interrupt based system-on-chip for IOT application with deterministic response and low power usage 

      Jain, Shweta (Dhirubhai Ambani Institute of Information and Communication Technology, 2016)
      Internet of Things (IOT) is rapidly evolving which requires a customized processorwith low power and minimum cost to leverage data gathered by sensors andaccordingly give output to the actuators and other physical objects. ...

    • Low power ASIC design using CPF 

      Patel, Darshal (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
      In recent years, with remarkable growth in personal computing devices, consumer electronics and communication devices, there has been seen urgent requirement for high speed computation and increased functionality. The ...

    • Low-power pipelined crypto-core using a backup flip-flop 

      Patel, Sagar (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      With increasing clock frequencies, power-aware computing has become a critical concern in the VLSI design. One of the most effective and widely used method for lowering the power is DVS (Dynamic Voltage Scaling), which ...

    • Modeling performance and power matrix of disparate computer systems using machine learning techniques (Modeling Compiler Systems Selection) 

      Mankodi, Amit (Dhirubhai Ambani Institute of Information and Communication Technology, 2022)
      In the last couple of decades, there has been an exponential growth in the processor, cache, and memory features of computer systems. These hardware features play a vital role in determining the performance and power of a ...

    • Performance enhancement of a pipelined architecture using backup FF 

      Singh, Shikha (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      Commonly used devices like computers and mobile phones demand faster processors. These devices need to live up to the ever growing demand of consumers for performance. Special techniques like Pipelining and Superscalar ...

    • Performance improvement of an out of order processor by decreasing branch mispredictions 

      Reddy, Syamala R. Krishna (Dhirubhai Ambani Institute of Information and Communication Technology, 2014)
      Superscalar processors are most common in hardware systems ranging from servers to small low power hand held devices. High performance Superscalar processors execute a large number of instructions to exploit Instruction ...

    • Power aware software design parallel programming with DVFS 

      Chikte, Shoeb (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      In the first decade of the 21st century, one of the fastest growing areas is Mobile Internet Devices (MIDs). This segment requires devices to be effecient in terms of power usage. Getting maximum performance in the limited ...

    • Power reduction schemes in an interrupt driven processor based SoC 

      Gupta, Shruti (Dhirubhai Ambani Institute of Information and Communication Technology, 2016)
      In recent time, an impressive growth of personal computing devices like portabledesktops, multimedia products and wireless communication systems has beennoted. As the IoT industry has grown very fast, so is the need for ...

    • Privacy Resilient Health Record Storage using Blockchain 

      Hingar, Ruchi (2021)
      Blockchain is a decentralized peer-to-peer distributed ledger. Each block of blockchain stores the hash of the previous block creating a chain of blocks, thus the name blockchain. Blockchain is said to tamper-evident and ...

    • Reconfigurable application specific instruction set processor for kalman filter (R-ASIK) 

      Dave, Kinjal (Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
      Kalman filter is one of the most important signal processing algorithms used in many tracking applications. The main challenges for hardware implementation of Kalman filter include compute intensiveness O (n3) of the ...

    • Reconfigurable Interrupt Driven Low Power Processor Having Deterministic Response 

      Bhatnagar, Harshit (Dhirubhai Ambani Institute of Information and Communication Technology, 2017)
      "With the growth in number of portable devices and applications in variety,the computational complexities have increased many folds. With such increase in complexities, the computational requirement has also gone up. And ...

    • Reduction of power using innovative Clock Gating and Multi Vth techniques in digital design 

      Sharma, Dushyant Kumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
      Low power is one of the most important issues in today’s ASIC (Application Specific Integrated Circuit) design. As the transistors scale down, power density becomes high and there is immediate need of reduction in power. ...

    • Study of the effectiveness of various low power techniques on sequential and combinational gate dominated designs 

      Rana, Kunj (Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
      In last decade, the technological advancement is seen in semiconductor field like never before. The need for low power has caused a major paradigm shift where power dissipation has become as important consideration as ...

    • Timing aware asic design flow (RC physical) 

      Kiran V, V S S Ravi (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
      Lack of communication between frontend and backend designers is the most important issue in today�s ASIC (Application Specific Integrated Circuits) design. The frontend designers lack knowledge about the long wires which ...