Now showing items 225-244 of 923

    • Design and synthesis of asynchronous circuits 

      Asthana, Abhinav (Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
      For a very long time, there has been a requirement of circuits that can overcome the difficulties caused by the delay assumptions involved in a physical system. With decreasing on-chip dimensions of circuits as a result ...
    • Design consideration for a novel batching control unit on an FPGA 

      Gandhi, Samkit Rakeshbhai (Dhirubhai Ambani Institute of Information and Communication Technology, 2018)
      In a concrete plant, the batch plant controls are needed to control and monitorthe amount of ingredients to be mixed to form concrete. This report presents designconsiderations for a novel batch mix controller. In the ...
    • Design issues in direct conversion receiver 

      Gupta, Amit Kumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
      The wireless system is being rapidly proliferated in our life. The growing of capacity in wireless communication requires a new type of wireless communication method which does not affect current work on circuits and systems ...
    • Design methodology for architecting application specific instruction set processor 

      Desai, Meghana (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
      Application Specific Instruction-set Processors (ASIP), also referred as extensible processors, represent the state-of-the-art microprocessor architecture. ASIPs are practically leading towards the realization of ...
    • Design of 16-bit 1MSamples/s differential SAR analog to digital converter 

      Nale, Rahul (Dhirubhai Ambani Institute of Information and Communication Technology, 2016)
      This work focusses on design of 16-bit, 1MSamples/s differential SAR ADC converter.We have applied split ADC architecture to SAR converter. The design canbe broadly classified in two parts viz. design of ideal A/D converter ...
    • Design of 4-bit Barrel Shifter in Quantum Dot Cellular Automata 

      Kollipara, Sai Sree Rohini (Dhirubhai Ambani Institute of Information and Communication Technology, 2023)
      This thesis proposes the design of a 4-bit barrel shifter using Quantum DotCellular Automata (QCA) technology. With decreasing feature size, CMOS technologyfaces various challenges like leakage current, drain induced barrier ...
    • Design of 64-bit SRAM using single electron transistor 

      Kale, Vishwamber N. (Dhirubhai Ambani Institute of Information and Communication Technology, 2016)
      The present day devices demand memory chips with larger size and smallphysical dimensions. This drives the designer to design high density memorydevices. The memory designed using CMOS technology do not have comparablespeed ...
    • Design of a CMOS variable gain amplifier 

      Verma, Vivek (Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
      In advanced CMOS technologies as device dimensions are decreasing, requirement for lower supply voltages are increasing to make certain device reliability. So, challenges for analog circuit designers are to discover new ...
    • Design of a high speed I/O buffer 

      Rathore, Akhil (Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
      In high speed serial transmission of data, output buffer creates the bottleneck. Current Mode Logic (CML) buffers have gained wide acceptance in most high speed serial interfaces as they reach speed of the order of Gbp/s. ...
    • Design of a low noise amplifier for UWB range of 5.5-8.5 GHz 

      Vyas, Krunal D. (Dhirubhai Ambani Institute of Information and Communication Technology, 2014)
      This study reviews and analyze the designing of Low Noise Amplifier. The parameters should be analyzed properly before the design of LNA, so this thesis includes the basics of all parameters with transmission line usage ...
    • Design of a low power high slew rate OPAMP and to study its impact on sigma delta modulator's performance 

      Verma, Aseem (Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
      This thesis presents the work done on the design of a low-power, high slew rate opamp and subsequently the design of a fully-differential second order Switched-Capacitor architecture of a Sigma Delta modulator in 1.8 V, ...
    • Design of a low power, high speed MAC unit 

      Mohanty, Swaprakash (Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
      MAC operation is the main computational kernel in any digital signal processing architectures. MAC consumes nearly 2/3 portion of total power dissipated in a DSP block. This thesis deals with the design of a low power, ...
    • Design of a novel high linearity down conversion mixer for GSM band applications 

      Srinaga, Nikhil N. (Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
      Double balanced Gilbert cell mixer (GCM) is the mostly used kind of mixer as it provides conversion gain and has port to port isolation. This mixer lacks in linearity and noise figure which are to be taken care in designing ...
    • Design of a Real Time Low Power Interrupt Driven Processor With Fair Scheduling 

      Shrotriya, Tushin (Dhirubhai Ambani Institute of Information and Communication Technology, 2017)
      "Recent times have seen a considerable amount of growth in the processor industry. The design of a processor is mainly focussed on two aspects namely, high performance or low power. While some high-end applications require ...
    • Design of AHB-Wishbone bridge 

      Mistry, Shailesh (Dhirubhai Ambani Institute of Information and Communication Technology, 2004)
      System-on-Chip (SoC) design is performed through integration of pre-designed components, called intellectual Property (IP). Design reuse is a critical feature in SoC design. Design reuse is the simple concept of using IP ...
    • Design of an analog phase shifter at X-band for radar and telecom applications 

      Pariyani, Sandeep (Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
      When examining a monthly bank account statement it is not only the number below the bottom line that matters. Whether that number has a minus or plus in front of it is also crucial. For many technical issues, the sign ...
    • Design of an interrupt driven processor having deterministic exception response 

      Parikh, Sagar (Dhirubhai Ambani Institute of Information and Communication Technology, 2016)
      In recent times, we have seen an impressive growth of portable devices, audiovideobased multimedia products and wireless communication systems. To meetthe intensive computational requirements and complex real time functions, ...
    • Design of architecture of artificial neural network : design and construction of a model for creation of an architecture of artificial neural network based on distributed genetic algorithms 

      Rahi, Sajid S. (Dhirubhai Ambani Institute of Information and Communication Technology, 2004)
      The objective of the work is to design and construct a model for creation of architecture of feed forward artificial neural network. The distributed genetic algorithms are used to design and construct the system. This ...
    • Design of CDMA transmitter and three finger rake receiver 

      Pateriya, Bhavana (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
      As cellular wireless communication becomes a worldwide communication standard, it is important in studying how data communications happens in a cellular system. In this Thesis work CDMA transmitter and receiver have been ...
    • Design of CMOS front end for 900MHz RF receiver 

      Harshey, Jitendra Prabhakar (Dhirubhai Ambani Institute of Information and Communication Technology, 2004)
      Portable wireless personal communication systems such as cellular phones, message pagers, and wireless modems traditionally have been built from a mixture of IC technologies. In fact if we section a commercial cellular ...